The latest generation of mobile networks requires an ever expanded capacity to support high-rate multimedia applications on a common communication channel [1]. Since the spectrum is dynamically assigned to users, an access scheme is needed to share the radio transmission resources. Among the various alternatives proposed, many are based on the technique known as code division multiple access (CDMA) due to its flexibility and low-cost implementation.
According to the CDMA technique, bits of information are produced at a certain bit rate. For example, if a bit is produced every Tb seconds, the rate is 1/Tb. The bits of information that are produced are grouped to form spectrum symbols to be broadcast at a certain symbol rate. For example, if there are 4 bits for each symbol, the symbol rate of transmission will correspond to 1/T=¼Tb.
From each symbol to be broadcast N_S chips are obtained and are eventually broadcast in a block format. Therefore, the chip-rate is the rate at which the chips are generated. For the considered example, the chip-rate is N_S/T.
A scheme according to which data bits are grouped to form data symbols and from which a number of respective chips are obtained is illustrated in FIG. 1. Unfortunately, multipath propagation of the channel of each user significantly affects performance of CDMA transmissions. In fact, channel dispersion disrupts orthogonality among codes of different users causing multi-user access interference (MAI). Multi-user access interference (MAI) means that any block of a de-spread signal will not ideally contain the spread chips belonging to a certain CDMA symbol. On the contrary, it will contain beside the spread chips of the CDMA symbol pertaining to the user and incumbent noise but also the spread chips of CDMA symbols pertaining to other users. Interference among the transmitted chips of a CDMA symbol of the user is known as interchip interference (ICI). As a consequence, de-spreading of the received chips within the receiver may sometimes not properly restore the data signal with the effect of producing so-called inter-symbol interference (ISI).
To contrast MAI, ICI and ISI, various receiver architectures have been proposed. One of the most common approaches is the rake receiver [2], which for moderately dispersive channels provides a good trade-off between complexity and performance. As channel dispersion increases, the performance of this receiver significantly degrades. Top performance receivers should include multi-user detection (MUD), whereby more users may be simultaneously detected [3]. A suboptimal, but still effective MUD technique is that of interference cancellation (IC), according to which, in cascade of a bank of rake receivers, data of all users are detected to permit tentative decisions that are used to construct MAI, which as purposely reconstructed may be then cancelled out of the received signal. Two IC schemes have been proposed: serial IC (SIC) and parallel IC (PIC).
According to the SIC scheme, at each stage only one user is detected and its interference contribution is canceled before detecting the next user and so forth. According to the PIC scheme, simultaneous detection of all users and IC are performed iteratively. However, the performance of known SIC and PIC schemes with rake receivers remains affected by ICI and ISI. Moreover, because the rake receivers operate at the chip-rate, computational complexity of such SIC and PIC schemes may become significant for channels with more than just a few taps.
To curb ICI, linear equalizers operating at the chip-rate have been studied [4], [5], and a joint equalization and MUD scheme has been proposed [6]. With regard to non-linear approaches, a common equalization structure comprises a feed-forward filter operating at the chip-rate, and a feedback filter which is fed with prior detected symbols [7]-[11]. A scheme that iterates IC and linear equalization has been proposed [11] according to which coding step is included in the iterative process. This increases significantly the overall complexity.
All these receiver structures operate in the time domain (TD) at the chip-rate, hence their computational complexity is quite high. To reduce complexity, two efficient implementations of PIC have been investigated [12]. The first concentrates the IC only on the most significant terms, while the second exploits the multistage organization of PIC to avoid double calculations.
Another structure has been proposed in [13], wherein design and performance evaluations are derived for channels with particular statistical properties and for the asymptotic case of infinite length filters. The efficiency of the receiver is enhanced by implementing all filters in the frequency domain (FD) through element-wise products of discrete Fourier transforms (DFTs), and the resulting structure is denominated FD-IC. Equivalence between time-domain filtering and the DFT products is ensured by employing a special transmission format of data block, according to which the stream of chips is divided into blocks separated either by a cyclic extension or by a fixed PN sequence [14], [15]. Drawbacks of this structure are a slight bandwidth inefficiency due to the data block extension, and an increased latency because detection is performed on blocks of CDMA symbols.
At the receiver, for each stage of the IC process, a block DFE step is iterated with a detection step. In particular, for each user, at the first iteration only the feed-forward (FF) filter is active and a tentative decision on data is produced. At the next iterations, decisions already produced during previous iterations are used to generate the feedback (FB) filter input signal, the output of which is added to the FF filter output before the new data detection, [11]. Notwithstanding the fact that the coefficients of both FF and FB filters are varied, depending on the reliability of the detected data at the previous iteration when studying the performance of many channels, error propagation in the DFE block becomes significant due to the CDMA spreading, whereby an error on one symbol generates a burst of wrong chips.